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NXP Semiconductors
PCA24S08A
1024 × 8-bit CMOS EEPROM with access protection
Table 5. APP memory map
X = ‘Don’t care’ upon writing and undefined upon reading.
Address
0
1
2
3
4
5
6
7
8
Bit 7
SB0
SB1
SB2
SB3
SB4
SB5
SB6
SB7
SBAP
Bit 6
X
X
X
X
X
X
X
X
X
Bit 5
X
RF0
RF1
RF2
RF3
RF4
RF5
RF6
RF7
Bit 4
X
Bit 3
X
X
X
X
X
X
X
X
X
Bit 2
X
X
X
X
X
X
X
X
X
Bit 1
Bit 0
PB0
PB1
PB2
PB3
PB4
PB5
PB6
PB7
PBAP
9
10
WPN7
DE
WPN6
DC
WPN5
X
WPN4
X
WPN3
X
WPN2
X
WPN1
X
WPN0
TAMPER
11
12
13
14
15
reserved; R/W
reserved; R/W
reserved; R/W
reserved; read-only
device revision
6.5 PROT pin
The PROT pin is used as a power good signal. When this pin is held LOW, the serial port
is held in reset and all sticky bits are set to one. When HIGH, activity on the serial bus is
permitted and sticky bits can be set to their values.
6.6 Serial EEPROM exceptions
In general, the two-wire serial interface on the PCA24S08A functions identically to the
24C08. The following exceptions exist, as noted elsewhere in this document.
? Pins 1, 2, and 3 have different usage.
? Access to various blocks may be restricted via the access protection circuitry.
? The two block address bits (B2 and B1) in the command byte are ignored with all read
commands. They are set only via the write command.
? Multi-byte reads do not cross block boundaries, but instead wrap to the beginning of
the block.
? The serial port will be reset whenever the PROT pin is LOW.
? If more than 16 bytes are written to the EEPROM with a page write, overlapping bytes
will have their values corrupted.
? If V DD is 0 V, the device draws current on the SDA, SCL, WP, and PROT pins when
they are brought above 0 V.
PCA24S08A_1
? NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 01 — 19 January 2010
13 of 24
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